Linear forward error correcting (FEC) codes have wide applications in communication and mass storage systems where data integrity and correctness have to be protected. Linear block FECs take a block of data digits and protect the data block by adding a number of redundant digits. Typically, an encoder computes these redundant digits, while a decoder uses the redundant digits to determine the correctness of a received data block and where possible, corrects an erroneous block of data using the redundant digits.
Linear block codes are denoted by the notation (n,k) where k message digits are encoded into n coded digits by an encoder module. As such, n−k redundant digits are added to the k message digits (e.g., data block) by the encoder. The n−k redundant digits are also referred to as parity digits. Where systematic code is implemented, the n coded digits are simply the k message digits (e.g., data block) followed by n−k parity digits.
Parity digits are computed based on a generator polynomial g(x) defined on a Galois Field (GF). For binary linear block codes, the generator polynomial g(x) is defined on a second order (GF(2)) Galois Field. For non-binary linear block codes, the generator polynomial g(x) is defined on a q^m order (GF(q^m)) Galois Field, where q is a prime number. Reed Solomon (RS) encoders fall under the class of non-binary linear block codes.
For a 10 Gbps encoder, the maximum line rate that can be achieved is 11.09 Gbit/sec. Using a serial input, where a single input is processed at a time, achieving such a line rate would require clocking to operate at (11.09/m)=1.109 GHz. Because of the complex logic involved in computing parity digits, maintaining such a high line rate while using serial inputs is very difficult to achieve.